Product Code: PIC06_M105

A Process Study of Laser Micro-Drilling Vias for Wafer Level Chip Scale Packaging
Hong Yu Zheng, Singapore Institute of Manufacturing Technology; Singapore
Presented at PICALO 2006

Along with the trends of the product minimization, wafer level chip scale package (WLCSP) has become a new solution to advanced packaging. Formation of micro-vias with desired patterns is a critical process step. Currently micro-vias are achieved through photolithographic technology, which is lengthy, time-consuming and costly. In order to improve the productivity and reduce the cost of the via formation process, it is critical to develop a simpler and more cost-effective drilling technology. The successful application of laser drilling in printed circuit boards renders us to apply the technology in drilling microvias of WLCSPs. The critical new challenges of the laser drilling of WLCSPs are the requirements of forming straight-walled vias on a thin copper layer (less than 1 μm). In this paper, we report our experimental results using a Q-switched CO2 laser and a KrF excimer laser.

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